Conventional high-performance data communication systems include serial links that interconnect computer boards, integrated circuit devices, and subsystems within an integrated circuit device. A serial link typically includes a receiver circuit whose function is to convert an incoming signal that may contain analog imperfections, into a digital representation consisting of 1's and 0's. The receiver compares the incoming signal against a reference level when single-ended signaling is used to determine whether the incoming signal is interpreted as 0 or 1 at a given time. When differential signaling is used, the receiver compares true and complement versions of the differential signal against each other to determine whether the incoming signal is interpreted as 0 or 1 at a given time.
A problem in many receiver circuits is the presence of “offset” in the circuitry of the receiver, For example, instead of performing a comparison that is mathematically be described as Vinput<Vref, the actual comparison performed by the receiver is Vinput+Verror<Vref. Vinput is the voltage of the signal sampled at the receiver, Vref is a reference voltage used to distinguish between 0 and 1, and Verror is the amount of error introduced by the receiver circuit or contained in the received signal. A correction value, Vcorr, may be applied to counteract Verror, so that the comparison Vinput<Verror−Vcorr+Vref is performed by the receiver circuit. The correction value enables the receiver to correctly interpret an incoming signal transmitted over the serial link.
Thus, there is a need for determining a correction value and/or addressing other issues associated with the prior art.